Process Overview of VCI’s Patented Technology » Standard semiconductor die in wafer form » Die pads rerouted to die periphery » Die insulation » Wafer thinning » Singulation » Stacking and lamination » Vertical interconnection » Packaging & final test     » Standard BGA, SOP or Hermetic     » Package-less (micropede ™)	Advantages » Small Size & Height – True Chip Scale » High Speed » Excellent Signal Integrity » Low Skew » Excellent Thermal Performance » Superior Reliability
Step One: Redistribution (Wafer RDL or Conductive Polymer) *Optional	Step Two: Dielectric Coat & ViP™Prep
Step Three: Parallel Stacking	Step Four: Vertical Interconnect Process (ViP™)